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Thread: Amd 1.4 Ghz 266 Oem $99

  1. #1
    Chief of Naval Operations johnnymk's Avatar
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    Amd 1.4 Ghz 266 Oem $99

    It's at Thompsons Computer Warehouse. Phone orders only
    1-800-394-4503 $6.95 shipping

  2. #2
    Is this one with the 128k L1 cache?

  3. #3
    Fry's has the retail boxed Athlon 1.4GHz and ECS K7S5A for $170 until Tuesday.
    Sys Specs: Dell Dimension 8250, P4 2.4GHz 533MHz FSB, 256MB PC1066, Radeon 9700 TX
    Best $241 computer I ever bought.

  4. #4
    All Athlons and Durons have 128KB L1 cache. The one above is an Athlon (T-Bird) with 256KB L2 cache, too.
    Sys Specs: Dell Dimension 8250, P4 2.4GHz 533MHz FSB, 256MB PC1066, Radeon 9700 TX
    Best $241 computer I ever bought.

  5. #5
    Actually...

    I think you are wrong Paul... some of the Athlons/Durons I've seen only have 64k L1 caches... the L2 are always 256k.

  6. #6
    No, look at the www.amd.com

    All Athlons, from the original K7 models to the Morgan and Palomino core CPUs, have 128KB of L1 cache. The K7 had no on die L2 cache (original Slot A). The K75 core had no L2 cache (second generation Slot A). The T-Bird core had/has 256KB of L2 cache on die. The Duron had/has 64KB L2 cache on die. And now the Morgan core Duron (1.0GHz and faster) has 64KB L2 cache. The Palomino core Athlon (Athlon XP, Athlon MP, mobile Athlon4) has 256KB L2 on die cache.

    The L1 cache is the same 128KB for every Athlon and Duron produced so far. On die L2 cache for the Athlon Tbird and Palomino has always been 256KB and the on die L2 cache for the Duron (Spitfire) and Morgan cores has always been 64KB.
    Sys Specs: Dell Dimension 8250, P4 2.4GHz 533MHz FSB, 256MB PC1066, Radeon 9700 TX
    Best $241 computer I ever bought.

  7. #7
    Okay, okay.. I think I see what's been happening. A lot of the merchants when listing their products give very crappy information, and it makes things even worse when AMD splits up the L1 cache into 2 sections: data and instruction. Some of the websites only seem to include the 1st section of the L1 cache or just combine the section.

    My only question now is, is splitting the L1 cache and devoting it to instruction as effective as just keeping the entire cache data? I am assuming this involves the data prefetch, right?

    Hehe, sorry to question your vast stores of knowledge, paul

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